CMOS PLL Synthesizers Analysis and Design－CMOS相同步逻辑电路的分析和设计

下载资料简介：
CMOS PLL Synthesizers Analysis and Design，pdf版英文原版电子书。
中文名：CMOS相同步逻辑电路的分析和设计
Springer出版的《CMOS相同步逻辑电路的分析和设计》。
内容简介：
This book presents both fundamentals and the state of the art of PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis are covered. A 16mW, 2.4GHz, sub-2V, Sigma Delta fractional-N synthesizer prototype is implemented in 0.35m m CMOS. It features a high-speed and robust phase-switching prescaler, and a low-complexity and area-efficient loop capacitance mulitplier, which tackle speed and integration bottlenecks of PLL synthesizer elegantly.
This book is conceived as a PLL synthesizer manual for both academia researchers and industry design engineers.

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