AD817 However, if additional nulling is required, the circuit shown in Application Circuit

Analog Devices, Inc.

find AD817 datasheet
AD817 circuit
AD817
OFFSET NULLING
The input offset voltage of the AD817 is inherently very low.
However, if additional nulling is required, the circuit shown in
Figure 32 can be used. The null range of the AD817 in this con-
figuration is
±
15 mV.
AD817 SETTLING TIME
0
–2
–4
–6
–8
–10
SETTLING TIME TO %
OF FINAL VALUE
10
8
6
4
2
0
OUTPUT SWING – Volts
0.20
0.15
0.10
0.05
0
0.05
0
50
100
150
200
250
300
350
400
SETTLING TIME TO %
OF FINAL VALUE
0.05
0
0.05
0.10
0.15
0.20
0
50
100
150
200
250
300
350
400
Figure 34. Settling Time in ns 0 V to –10 V
Figure 33. Settling Time in ns 0 V to +10 V
HP2835
ERROR AMPLIFIER
V
ERROR
OUTPUT
×
10
3
HP2835
2
7
0.01µF
ERROR
SIGNAL
OUTPUT
100Ω
0.47µF
–V
S
+V
S
1.9kΩ
0.01µF
5
100Ω
1MΩ
15pF
4
6
0.47µF
SETTLING
OUTPUT
SHORT, DIRECT
CONNECTION TO
TEKTRONIX TYPE 11402
OSCILLOSCOPE PREAMP
INPUT SECTION
0 TO
±10V
POWER
SUPPLY
EI&S
DL1A05GM
MERCURY RELAY
7, 8
2
50Ω
COAX
CABLE
1kΩ
NULL
ADJUST
FALSE
SUMMING
NODE
500Ω
1kΩ
NOTE:
USE CIRCUIT BOARD
WITH GROUND PLANE
100Ω
TTL LEVEL
SIGNAL
GENERATOR
50Hz
OUTPUT
13
1, 14
5–18pF
500Ω
2
50Ω
3
4
DEVICE
UNDER
TEST
6
AD817
7
10pF
SCOPE PROBE
CAPACITANCE
2.2µF
0.01µF
TEKTRONIX P6201
FET PROBE TO
TEKTRONIX TYPE
11402
OSCILLOSCOPE
PREAMP INPUT
SECTION
DIGITAL
GROUND
2.2µF
ANALOG
GROUND
0.01µF
–V
S
+V
S
Figure 35. Settling Time Test Circuit
–10–
REV. B
OUTPUT SWING – Volts
Settling time is comprised primarily of two regions. The first is
the slew time in which the amplifier is overdriven, where the
output voltage rate of change is at its maximum. The second is
the linear time period required for the amplifier to settle to
within a specified percent of the final value.
Measuring the rapid settling time of AD817 (45 ns to 0.1% and
70 ns to 0.01%–10 V step) requires applying an input pulse with
a very fast edge and an extremely flat top. With the AD817 con-
figured in a gain of –1, a clamped false summing junction re-
sponds when the output error is within the sum of two Diode
voltages (ª1 volt). The signal is then amplified 20 times by a
clamped amplifier whose output is connected directly to a sam-
pling oscilloscope. Figures 33 and 34 show the settling time of
the AD817 with a 10 volt step applied.